EEC116 - Fall 2011 EEC116 - VLSI Design UC Davis Dept. Of Electrical and Computer Engineering Instructor: Prof. Rajeevan Amirtharajah 3173 Kemper Hall E-mail: Office Hours: Friday 2 PM - 3 PM or by appointment. Teaching Assistants: Stanley Hsu E-mail: Office hours: Tuesdays, 2-4 PM in Kemper 2107 Course Information Lecture: Mon/Wed 4:00 pm - 5:30 pm in Hoagland 108 Textbook: Digital Integrated Circuits: A Design Perspective J.
Chandrakasan, and B. Nikolic 2nd edition References: CMOS Digital Integrated Circuits: Analysis and Design S-M. Leblebici 3rd edition CMOS VLSI Design - A Circuits and Systems Perspective N.
Harris 4th edition Midterm: Mon 10/31/11 in class. Closed book, closed notes. Calculators are allowed.
Final: Wednesday December 7th, 1:00 PM to 3:00 PM, in normal lecture room (Hoagland 108) Communication Course web page: The web page can also be accessed from the EEC 116 SmartSite. Please use email to contact me or the TA for your lab section only, for urgent or personal matters that cannot be handled through office hours, in-class questions, or immediately after class. Grading. 35% Labs. 5% Weekly Homework.
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10% Quizzes. 20% Midterm (Monday, October 31, in class). 30% Final (Wednesday, December 7, 1:00 PM-3:00 PM) Course Policies Homework All work must be done individually. On each homework, write your name, lab section number, and problem set number clearly at the top. All homeworks are due Wednesday at 4:00 PM (before lecture) in Room 2131 and will be returned in your lab section after grading. Unfortunately, late homeworks cannot be accepted except for verifiable medical excuses approved by the instructor. Homeworks will include prelab exercises.
If you do not turn in the homework before the lab, your maximum grade for that lab will be decreased 50%. Each homework problem will be graded on a three-point scale: 0 (not a full effort), 1 (close but fundamental problem), and 2 (correct).
Quizzes, Midterm, and Final exam Four announced quizzes will be given throughout the quarter. They are designed such that students that do required readings and listen in lecture will earn very high scores. Students that do not do required readings and do not listen in lecture will likely receive much lower scores. Quizzes are closed book and closed notes, although a calculator is allowed. They are designed to be completed in about 10 minutes.
The lowest of the four scores will be dropped. The midterm and final exam are mandatory components of this course. Unfortunately, no early or late exams are possible. If an unavoidable emergency prevents your attendance at the midterm or final, you will be required to submit written proof of the emergency and the make-up exam will likely be given as an oral exam with the instructor. Course Schedule Future details are tentative. Date Reading Lecture Slides Notes Mon, Sep 26 Rabaey 1, 2, A Course Introduction MOS Fabrication Layout Overview Wed, Sep 28 Rabaey 3.1-3.4 Rabaey 5.1-5.3 MOS Structure and Basic Operation CMOS Inverters Mon, Oct 3 Rabaey 3.3-3.5 Rabaey 5.4-5.6 MOSFET Scaling and Parasitics CMOS Inverter Dynamic Characteristics Wed, Oct 5 Rabaey 6.1-6.2.1 (up to p. 251) Combinational MOS Logic Mon, Oct 10 Rabaey 11 Arithmetic Circuits Hardware Description Languages Wed, Oct 12 Rabaey 11 Arithmetic Circuits Mon, Oct 17 Rabaey 6.2.3 (especially p.
Sung-Mo Kang, University of California-Santa Cruz Yusuf Leblebici, Swiss Federal Institute of Technology Welcome to the website for CMOS Digital Integrated Circuits: Analysis and Design, ©2003, ISBN 0-07-246053-9. This is the most complete book on the market for CMOS circuits. Appropriate for electrical engineering and computer science, this book starts with CMOS processing, and then covers MOS transistor models, basic CMOS gates, interconnect effects, dynamic circuits, memory circuits, BiCMOS circuits, I/O circuits, VLSI design methodologies, low-power design techniques, design for manufacturability and design for testability. This book provides rigorous treatment of basic design concepts with detailed examples. It typically addresses both the computer-aided analysis issues and the design issues for most of the circuit examples. Numerous SPICE simulation results are also provided for illustration of basic concepts. Through rigorous analysis of CMOS circuits in this text, students will be able to learn the fundamentals of CMOS VLSI design, which is the driving force behind the development of advanced computer hardware.
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We encourage you to explore this site for helpful resources for instructors and students. If you click on the Information Center link on the left, you will find the following: Table of Contents, About the Authors, Preface, PageOut, McGraw-Hill EngineeringCS.Com, and Errata. Students should be sure to click on the Student Resources link to access a CADENCE software tutorial and a set of color plates that illustrate CMOS fabrication and mask-layout design. The site also contains essential material for the Instructor. Click on the Instructor Resources link to find: the Solutions Manual and PowerPoint slides for each chapter of the book. If you are an instructor who has adopted the text and are interested in accessing these resources, please contact your Sales Rep. For the User ID and Password.
Chapters 1, 2, and 5 of the Lecture Slides are now available. 2003 McGraw-Hill Higher Education Any use is subject to the and. Is one of the many fine businesses of.